Added george binary, asm, and memory config for ld65
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Binary file not shown.
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@ -0,0 +1,6 @@
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.setcpu "65C02"
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.segment "CODE"
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LDA #$25
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LDY #$25
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STY $2000
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ADC $2000
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@ -0,0 +1,10 @@
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MEMORY {
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RAM: start = $0000, size = $4000, type = rw, fill = true;
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CTRL: start = $4000, size = $2000, type = rw, fill = true;
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VRAM: start = $6000, size = $8000, type = rw, fill = true;
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ROM: start = $E000, size = $2000, type = ro, fill = true;
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}
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SEGMENTS {
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CODE: load = "RAM", type = rw;
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}
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89
src/main.rs
89
src/main.rs
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@ -1,4 +1,5 @@
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#![allow(dead_code)]
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use core::panic;
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use std::{
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collections::HashMap,
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fs::{self, File},
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@ -13,7 +14,7 @@ type Byte = u8;
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type Word = u16;
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#[derive(Debug)]
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struct MemArea {
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struct MemMappedDevice {
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start: Word,
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end: Word,
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pages: usize,
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@ -22,19 +23,19 @@ struct MemArea {
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label: String,
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}
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impl MemArea {
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impl MemMappedDevice {
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fn new(start: Word, end: Word, pages: usize, label: String) -> Self {
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Self {
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start,
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end,
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pages,
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page: 0,
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data: vec![0x00; end as usize - start as usize],
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data: vec![0x00; (end as usize + 1 - start as usize) * pages],
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label,
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}
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}
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fn contains(&self, address: Word) -> bool {
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self.start <= address && self.end > address
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self.start <= address && self.end >= address
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}
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fn swap_page(&mut self, page: usize) -> Result<(), MappingError> {
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match page > self.pages {
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@ -45,15 +46,18 @@ impl MemArea {
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}
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}
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}
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fn size(&self) -> Word {
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self.end - self.start + 1
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}
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fn translate_address(&self, address: Word) -> Word {
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address - self.start
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(address - self.start) + self.size() * (self.page as Word)
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} // This needs to translate memory address from CPU land to local land, so
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// for rom an address like 0xFFFF needs to be translated to Page X, 0xFFF
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}
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#[derive(Debug)]
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struct Mem {
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areas: Vec<MemArea>,
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areas: Vec<MemMappedDevice>,
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}
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#[derive(Debug)]
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@ -70,10 +74,10 @@ enum MappingError {
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}
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impl Mem {
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fn new(area: MemArea) -> Self {
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fn new(area: MemMappedDevice) -> Self {
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Self { areas: vec![area] }
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}
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fn add_area(&mut self, area: MemArea) -> Result<(), MappingError> {
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fn add_area(&mut self, area: MemMappedDevice) -> Result<(), MappingError> {
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for existing_area in &self.areas {
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if existing_area.contains(area.end) || existing_area.contains(area.start) {
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return Err(MappingError::RegionOccupied);
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@ -107,7 +111,7 @@ impl Mem {
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Err(MemoryError::Unmapped)
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}
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fn from_bin(&mut self, f: File) -> Result<(), MemoryError> {
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fn read_from_bin(&mut self, f: File) -> Result<(), MemoryError> {
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let bytes = f.bytes();
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for (address, byte) in bytes.enumerate() {
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match byte {
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@ -251,29 +255,29 @@ impl Cpu {
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unimplemented!()
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}
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//fn handle_interrupt(&mut self) -> Result<(), ExecutionError> {
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// match self.get_flag(StatusFlag::IrqDisable) {
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// // Check that interrupts aren't disabled
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// true => Err(ExecutionError::InterruptsDisabled),
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// false => {
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// if self.irq {
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// let irq_vector = 0xFFFC;
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// match self.read_word(irq_vector) {
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// Err(error) => Err(ExecutionError::MemoryError(error)),
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// Ok(address) => {
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// let isr_address = address;
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// match self.read(isr_address) {
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// Ok(opcode) => self.execute(opcode),
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// Err(error) => Err(ExecutionError::MemoryError(error)),
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// }
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// }
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// }
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// } else {
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// Ok(())
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// }
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// }
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// }
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//}
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// fn handle_interrupt(&mut self) -> Result<(), ExecutionError> {
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// match self.get_flag(StatusFlag::IrqDisable) {
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// // Check that interrupts aren't disabled
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// true => Ok(self.execute()),
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// false => {
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// if self.irq {
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// let irq_vector = 0xFFFE;
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// match self.read_word(irq_vector) {
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// Err(error) => Err(ExecutionError::MemoryError(error)),
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// Ok(address) => {
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// let isr_address = address;
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// match self.read(isr_address) {
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// Ok(_opcode) => Ok(self.execute()),
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// Err(error) => Err(ExecutionError::MemoryError(error)),
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// }
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// }
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// }
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// } else {
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// Ok(())
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// }
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// }
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// }
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// }
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fn stop(&mut self) {
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unimplemented!()
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}
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@ -309,7 +313,10 @@ impl Cpu {
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let instruction = get_instruction(opcode);
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match instruction {
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Instruction::Valid(valid_instruction) => {
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println!("accumulator: {a:#04x}, x: {x:#04x}, y: {y:#04x}, program counter: {pc:#06x}, stack pointer: {s:#04x}, status register: {p:#04x}, irq pin: {irq:?}, nmi pin: {nmi:?}", a = self.a, x = self.x, y = self.y, pc = self.pc, s = self.s, p = self.p, irq = self.irq, nmi = self.nmi);
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println!("Instruction: {:?}", valid_instruction.opcode);
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println!("a: {a:#04x}, x: {x:#04x}, y: {y:#04x}, pc: {pc:#06x}, sp: {s:#04x}, sr: {p:#010b}, irq: {irq:?}, nmi: {nmi:?}", a = self.a, x = self.x, y = self.y, pc = self.pc, s = self.s, p = self.p, irq = self.irq, nmi = self.nmi);
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println!("");
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self.pc += 1;
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match valid_instruction.opcode.call(self) {
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Ok(_) => {
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self.pending_cycles += valid_instruction.cycles as usize;
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@ -394,7 +401,7 @@ fn get_instruction(opcode: u8) -> Instruction {
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(
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0x00,
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Instruction::Valid(ValidInstruction {
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opcode: Opcode::BRK(AddressingMode::Stack),
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opcode: Opcode::BRK(AddressingMode::Implied),
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cycles: 7,
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}),
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),
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@ -2648,7 +2655,7 @@ impl Opcode {
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Opcode::BRK(mode) => match mode {
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AddressingMode::Implied => {
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cpu.set_flag(StatusFlag::Brk, true);
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Ok(())
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panic!("Interrupts unimplemented!");
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}
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_ => Err(ExecutionError::IncompatibleAddrMode),
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},
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@ -3417,10 +3424,10 @@ impl Opcode {
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}
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fn main() {
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let ram = MemArea::new(0x0000, 0x3FFF, 2, "ram".into());
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let control = MemArea::new(0x4000, 0x5FFF, 4, "rom".into());
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let vram = MemArea::new(0x6000, 0xDFFF, 1, "vram".into());
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let rom = MemArea::new(0xE000, 0xFFFF, 4, "rom".into());
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let ram = MemMappedDevice::new(0x0000, 0x3FFF, 2, "ram".into());
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let control = MemMappedDevice::new(0x4000, 0x5FFF, 4, "control".into());
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let vram = MemMappedDevice::new(0x6000, 0xDFFF, 1, "vram".into());
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let rom = MemMappedDevice::new(0xE000, 0xFFFF, 4, "rom".into());
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let mut memory = Mem::new(ram);
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match memory.add_area(control) {
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Err(error) => println!("Error adding vram: {:?}", error),
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@ -3435,12 +3442,12 @@ fn main() {
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Ok(()) => {}
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};
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let binary = match fs::File::open(PathBuf::from(
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"/Users/kline/projects/winter/georgeemu/src/george.bin",
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"/Users/kline/projects/winter/georgeemu/src/george",
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)) {
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Ok(file) => file,
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Err(error) => panic!("Couldn't open binary file! {:?}", error),
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};
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match memory.from_bin(binary) {
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match memory.read_from_bin(binary) {
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Err(error) => println!("{:?}", error),
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Ok(_) => {}
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};
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