4
memory
august edited this page 2024-02-09 15:24:10 -05:00
memory/system map
CPU Addressable
| Address | Usage |
|---|---|
$0000 |
32k ram (16k addressable) |
$1000 |
... |
$2000 |
... |
$3000 |
... |
$4000 |
I/0 & Hardware Control Registers |
$5000 |
... |
$6000 |
32k vram |
$7000 |
... |
$8000 |
... |
$9000 |
... |
$A000 |
... |
$B000 |
... |
$C000 |
... |
$D000 |
... |
$E000 |
32k eeprom (8k addressable) |
$F000 |
... |
hardware control register $4000
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|
| Usage | ROM Page MSB | ROM Page LSB | RAM Page | 32k Bank Page | Character/Hires Video Mode | Unused | Unused | Unused |
6845 crtc register interface at $4200 & $4201
when the system starts or when the video mode is changed, crt timing/character size information has to be sent to the 6845. This is done by writing to address $4200 which internal register you want to access, then reading from or writing to address $4201 (mostly writing to, all but four registers are write-only). for example, this is how you would set the number of characters per row to 80:
LDA #0 ;The "Horizontal Total" register is R0
STA $4200
LDA #80 ;Set the register value to 80 for 80 characters per row
STA $4201
keyboard rows $4400, $4401, $4402, $4403, $4404, $4405
each keyboard row is mapped to a read-only 8-bit register, with each key mapped to a single bit. due to the design of this keyboard, row 5 has 5 unused bits
| Address | Desc | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
$4400 |
Row 0 | esc |
w |
e |
r |
t |
u |
o |
backspace |
$4401 |
Row 1 | tab |
q |
s |
g |
y |
i |
p |
enter |
$4402 |
Row 2 | shift |
d |
v |
h |
k |
" |
? |
a |
$4403 |
Row 3 | control |
z |
f |
b |
j |
l |
2 |
4 |
$4404 |
Row 4 | alt |
x |
c |
n |
m |
' |
1 |
3 |
$4405 |
Row 5 | meta |
sp 1 |
sp 2 |